News

Chinese scientists made important progress towards low-power two-dimensional electronics

Pubdate:2020-05-28Visitor:14[Print]

Figure. Ultrathin high-κ dielectrics deposited on 2D materials and ultralow power transistor.

Supported by National Natural Science Foundation of China (No. 617340036152100161851401), a research team led by Prof. Wang Xinran(王欣然)and Prof. Shi Yi(施毅)from Nanjing University, in collaboration with Prof. Xiangfeng Duan at University of California, Los Angeles, Prof. Wei Chen at National University of Singapore, Prof. Kosuke Nagashio at University of Tokyo, Prof. Wang Peng(王鹏) and Prof. Ma Haibo (马海波) at Nanjing University, and Dr. Chen Tangsheng (陈堂胜) at CETC 55 have made a significant progress towards low-power two-dimensional (2D) electronic deviceswhich was published recengly in Nature Electronics (URL: https://www.nature.com/articles/s41928-019-0334-y).

2D semiconductors are potential candidates for extending Moore’s law, featuring non-zero bandgap, extreme channel thickness, high mobility, and excellent gate tunability. However, due to dangling bond free nature of 2D materials, it is extremely difficult to deposit high-quality oxide dielectrics by industrial atomic layer deposition (ALD) technology. Interface state density and effective oxide thickness (EOT) of 2D transistors are thus much higher than state-of-the-art silicon CMOS transistors. As a result, the scalable integration of high-quality and ultrathin dielectrics on 2D materials continue to be one of the bottlenecks for 2D electronics.

To solve the challenge, the team took advantage of the van der Waals interaction between 2D materials and organic molecules to realize the integration of high-quality and ultrathin high-κ dielectrics on 2D materials. With a 0.3nm-thick monolayer molecular crystal as the seeding layer, they were able to deposit atomically-flat oxide dielectrics on 2D materials such as graphene, MoS2 and WSe2 with low interface state density, high breakdown field and an EOT as low as 1nm. The gate leakage current was found to be at the same level as silicon complementary metal-oxide-semiconductor (CMOS). Moreover, the oxide dielectrics could work at high frequencies higher than 10 GHz, as demonstrated by the graphene radio frequency transistors. With this technique, they fabricated 2D CMOS transistors with a supply voltage of 0.8V and subthreshold swing down to 60 mV/dec. They also created MoS2 transistors with a channel length of 20 nm, which exhibits an on/off ratio of over 107 and is completely immune short channel effect. 2D material-based CMOS inverters with sub-1 nW power consumption were also demonstrated.

This technology not only provides a universal strategy to integrate ultrathin high-quality oxide on 2D materials, but also is compatible with large-area chemical vapor deposited films. This work paved the way for low-power integrated circuits based on 2D materials.

上一篇:下一篇: